Hardware testing of photovoltaic inverter loss of mains protection performance
Abdulhadi, I. and Dysko, A.; (2016) Hardware testing of photovoltaic inverter loss of mains protection performance. In: 13th International Conference on Development in Power System Protection 2016 (DPSP). IET, GBR. ISBN 978-1-78561-138-4 (https://doi.org/10.1049/cp.2016.0068)
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Abstract
This paper presents the findings from hardware testing of photovoltaic inverters in a realistic low voltage network setting. The objective of the tests was to evaluate the performance of inverter built-in loss of mains protection. The evaluation focuses on ensuring that this protection operates as expected during islanding situations, while avoiding spurious tripping during severe grid disturbances.
ORCID iDs
Abdulhadi, I. ORCID: https://orcid.org/0000-0002-3657-8379 and Dysko, A. ORCID: https://orcid.org/0000-0002-3658-7566;-
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Item type: Book Section ID code: 56781 Dates: DateEvent10 March 2016Published8 January 2016AcceptedNotes: This paper is a postprint of a paper submitted to and accepted for publication in [journal] and is subject to Institution of Engineering and Technology Copyright. The copy of record is available at IET Digital Library Subjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 29 Jun 2016 15:26 Last modified: 11 Nov 2024 15:04 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/56781