Hardware testing of photovoltaic inverter loss of mains protection performance

Abdulhadi, I. and Dysko, A.; (2016) Hardware testing of photovoltaic inverter loss of mains protection performance. In: 13th International Conference on Development in Power System Protection 2016 (DPSP). IET, GBR. ISBN 978-1-78561-138-4 (https://doi.org/10.1049/cp.2016.0068)

Preview

Text. Filename: Abdulhadi_Dysko_DPSP2016_hardware_testing_photovoltaic_inverter_loss_mains_protection_performance.pdf Accepted Author Manuscript Download (608kB)| Preview

Abstract

This paper presents the findings from hardware testing of photovoltaic inverters in a realistic low voltage network setting. The objective of the tests was to evaluate the performance of inverter built-in loss of mains protection. The evaluation focuses on ensuring that this protection operates as expected during islanding situations, while avoiding spurious tripping during severe grid disturbances.

• Share and Export
  

  RDF+XMLBibTeXRIOXX2 XMLRDF+N-TriplesJSONDublin CoreAtomSimple MetadataReferMETSHTML CitationASCII CitationOpenURL ContextObjectEndNoteOpenURL ContextObject in SpanMODSMPEG-21 DIDLEP3 XMLData Cite XMLRIS (EndNote Online, Zotero, Ref manager, etc)RDF+N3Multiline CSV
• Item metadata

  Item type:	Book Section
  ID code:	56781
  Dates:	Date Event 10 March 2016 Published 8 January 2016 Accepted
  Notes:	This paper is a postprint of a paper submitted to and accepted for publication in [journal] and is subject to Institution of Engineering and Technology Copyright. The copy of record is available at IET Digital Library
  Subjects:	Technology > Electrical engineering. Electronics Nuclear engineering
  Department:	Faculty of Engineering > Electronic and Electrical Engineering
  Depositing user:	Pure Administrator
  Date deposited:	29 Jun 2016 15:26
  Last modified:	05 Aug 2024 00:47
  Related URLs:	Event
  URI:	https://strathprints.strath.ac.uk/id/eprint/56781