Learning to implement floating-point algorithms on FPGAs using high-level languages

Bruce, R. and Marshall, S. and Devlin, M. and Vince, S. (2006) Learning to implement floating-point algorithms on FPGAs using high-level languages. In: The 1st International Workshop on Reconfigurable Computing Education, 2006-03-01.

[thumbnail of 311559.doc] Microsoft Word. Filename: 311559.doc
Preprint
Download (94kB)

Abstract

FPGA-based reconfigurable computers can offer 10-1000 times speedup in many application domains over traditional microprocessor-based stored-program architectures. As a discipline, reconfigurable computing is in a period of change with little standards in place. It is becoming desirable to educate students in the principles of reconfigurable computing. This paper proposes that the abstraction benefits of high-level languages and floating-point arithmetic would shield students from the complexities of FPGA design and allow a syllabus with a greater focus on system-level aspects.

ORCID iDs

Bruce, R., Marshall, S. ORCID logoORCID: https://orcid.org/0000-0001-7079-5628, Devlin, M. and Vince, S.;
CORE (COnnecting REpositories)