An atomistic simulation investigation on chip related phenomena in nanometric cutting of single crystal silicon at elevated temperatures
Chavoshi, Saeed Zare and Luo, Xichun (2016) An atomistic simulation investigation on chip related phenomena in nanometric cutting of single crystal silicon at elevated temperatures. Computational Materials Science, 113. pp. 1-10. ISSN 0927-0256 (https://doi.org/10.1016/j.commatsci.2015.11.027)
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Abstract
Nanometric cutting of single crystal silicon on different crystal orientations and at a wide range of temperatures (300-1500 K) was studied through molecular dynamics (MD) simulations using two sorts of interatomic potentials, an analytical bond order potential (ABOP) and a modified version of Tersoff potential, so as to explore the cutting chip characteristics and chip formation mechanisms. Smaller released thermal energy and larger values of chip ratio (ratio of the uncut chip thickness to the cut chip thickness) as well as shear plane angle were obtained when cutting was performed at higher temperatures or on the (1 1 1) crystal plane, implying an enhancement in machinability of silicon. Nonetheless, the subsurface deformation depth was observed to become deeper under the aforementioned conditions. Further analysis revealed a higher number of atoms in the chip when cutting was implemented on the (1 1 0) crystal plane, attributable to the lower position of the stagnation region which triggered less ploughing action of the tool on the silicon substrate. Regardless of temperature of the substrate the minimum chip velocity angle was found while cutting the (1 1 1) crystal plane of silicon substrate whereas the maximum chip velocity angle appeared on the (1 1 0) surface. A discrepancy between the two potential functions in predicting the chip velocity angle was observed at high temperature of 1500 K, resulting from the overestimated phase instability and entirely molten temperatures of silicon by the ABOP function. Another key observation was that the resultant force exerted by the rake face of the tool on the chip was found to decrease by 24% when cutting the (1 1 1) surface at 1173 K compared to that at room temperature. Besides, smaller resultant force, friction coefficient at the tool/chip interface and chip temperature was witnessed on the (1 1 1) crystal plane, as opposed to the other orientations.
ORCID iDs
Chavoshi, Saeed Zare ORCID: https://orcid.org/0000-0001-6083-585X and Luo, Xichun ORCID: https://orcid.org/0000-0002-5024-7058;-
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Item type: Article ID code: 55554 Dates: DateEvent15 February 2016Published30 November 2015Published Online17 November 2015AcceptedSubjects: Technology > Engineering (General). Civil engineering (General) > Engineering design
Technology > ManufacturesDepartment: Faculty of Engineering > Design, Manufacture and Engineering Management Depositing user: Pure Administrator Date deposited: 17 Feb 2016 13:53 Last modified: 01 Dec 2024 21:54 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/55554