Optimisation of passive system components to minimise DC circuit breaker stresses in multi-terminal HVDC systems
Page, Frederick and Finney, Stephen and Holliday, Derrick and Xu, Lie and Williams, Barry (2015) Optimisation of passive system components to minimise DC circuit breaker stresses in multi-terminal HVDC systems. In: Cigré International Symposium : Across Borders - HVDC Systems and Market Integration, 2015-05-27 - 2015-05-28.
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Abstract
HVDC circuit breaker designs have commonly included additional series inductance to reduce the rate of rise of current during the initial transient period after a fault occurs, minimising the peak current stress that the circuit breaker must endure. A method of approximating the peak fault current and energy dissipation in a circuit breaker is developed, through circuit analysis of a multi-level converter (MMC) under fault conditions. These approximations are validated against simulation results for an 800kV MMC system
ORCID iDs
Page, Frederick ORCID: https://orcid.org/0000-0001-9757-2889, Finney, Stephen ORCID: https://orcid.org/0000-0001-5039-3533, Holliday, Derrick ORCID: https://orcid.org/0000-0002-6561-4535, Xu, Lie ORCID: https://orcid.org/0000-0001-5633-7866 and Williams, Barry;-
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Item type: Conference or Workshop Item(Paper) ID code: 53154 Dates: DateEvent28 May 2015PublishedSubjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 01 Jun 2015 12:58 Last modified: 12 Dec 2024 16:16 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/53154