Learning to implement floating-point algorithms on FPGAs using high-level languages

Bruce, R. and Marshall, S. and Devlin, M. and Vince, S. (2006) Learning to implement floating-point algorithms on FPGAs using high-level languages. In: The 1st International Workshop on Reconfigurable Computing Education, 2006-03-01.

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Abstract

FPGA-based reconfigurable computers can offer 10-1000 times speedup in many application domains over traditional microprocessor-based stored-program architectures. As a discipline, reconfigurable computing is in a period of change with little standards in place. It is becoming desirable to educate students in the principles of reconfigurable computing. This paper proposes that the abstraction benefits of high-level languages and floating-point arithmetic would shield students from the complexities of FPGA design and allow a syllabus with a greater focus on system-level aspects.

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• Item metadata

  Item type:	Conference or Workshop Item(Paper)
  ID code:	37422
  Dates:	Date Event 2006 Published
  Subjects:	Technology > Electrical engineering. Electronics Nuclear engineering
  Department:	Faculty of Engineering > Electronic and Electrical Engineering
  Depositing user:	Pure Administrator
  Date deposited:	07 Feb 2012 09:44
  Last modified:	23 Jul 2024 00:48
  URI:	https://strathprints.strath.ac.uk/id/eprint/37422