A new design workflow for PYNQ enabled Xilinx platforms utilising the simulink environment for Vivado IPI abstraction

McLaughlin, Lewis D. and Crockett, Louise H. and Stewart, Robert W.; (2022) A new design workflow for PYNQ enabled Xilinx platforms utilising the simulink environment for Vivado IPI abstraction. In: 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) . IEEE, USA. ISBN 9781665483322 (https://doi.org/10.1109/fccm53951.2022.9786083)

[thumbnail of McLaughlin-etal-FCCM-2022-A-new-design-workflow-for-PYNQ-enabled-Xilinx-platforms-utilising-the-simulink-environment]
Preview
 Text. Filename: McLaughlin_etal_FCCM_2022_A_new_design_workflow_for_PYNQ_enabled_Xilinx_platforms_utilising_the_simulink_environment.pdf
Accepted Author Manuscript
License: Strathprints license 1.0
Download (648kB)| Preview

Abstract

Recently, FPGAs have been coupled with processors to form System on Chip (SoC) devices. SoC design is challenging as it combines both hardware and software elements. A variety of tools must therefore be utilised to design for these components, each requiring different knowledge.

ORCID iDs

McLaughlin, Lewis D., Crockett, Louise H. ORCID logoORCID: https://orcid.org/0000-0003-4436-0254 and Stewart, Robert W.;
  • Item type:Book Section
    ID code:81446
    Dates:
    Date
    Event
    3 June 2022
    Published
    18 May 2022
    Published Online
    21 March 2022
    Accepted
    Notes:© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:13 Jul 2022 10:37
    Last modified:08 Nov 2024 01:28
    URI:https://strathprints.strath.ac.uk/id/eprint/81446
CORE (COnnecting REpositories)