FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines

Northcote, David and Crockett, Louise H. and Murray, Paul; (2018) FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, ITA. ISBN 978-1-5386-4882-7 (https://doi.org/10.1109/ISCAS.2018.8351115)

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Abstract

The Line Hough Transform (LHT) is a robust and accurate line detection algorithm, useful for applications such as lane detection in Advanced Driver Assistance Systems. For real-time implementation, the LHT is demanding in terms of computation and memory, and hence Field Programmable Gate Arrays (FPGAs) are often deployed. However, many small FPGAs are incapable of implementing the LHT due to the large memory requirement of the Hough Parameter Space (HPS). This paper presents a memory-efficient architecture of the LHT named the Angular Regions - Line Hough Transform (AR-LHT). We present a suitable FPGA implementation of the AR-LHT and provide a performance and resource analysis after targeting a Xilinx xc7z010-1 device. Results demonstrate that, for an image of 1024x1024 pixels, approximately 48% less memory is used than the Standard LHT. The FPGA architecture is capable of processing a single image in 9.03ms.

ORCID iDs

Northcote, David ORCID logoORCID: https://orcid.org/0000-0003-0287-1531, Crockett, Louise H. ORCID logoORCID: https://orcid.org/0000-0003-4436-0254 and Murray, Paul ORCID logoORCID: https://orcid.org/0000-0002-6980-9276;