DSPWM multilevel technique of 27‐levels based on FPGA for the cascaded DC/AC power converter operation

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Salgado-Herrera, N.M. and Medina-Ríos, J. Aurelio and Tapia‐Sánchez, Roberto and Anaya-Lara, Olimpo and Rodríguez‐Rodríguez, Ramon (2018) DSPWM multilevel technique of 27‐levels based on FPGA for the cascaded DC/AC power converter operation. International Transactions on Electrical Energy Systems, 28 (1). e2479. ISSN 2050-7038 (https://doi.org/10.1002/etep.2479)

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Abstract

In this paper, a digital sinusoidal pulse width modulation (DSPWM) multilevel technique of 27-levels based on field programmable gate array (FPGA) is introduced, as an alternative to control of the direct current/alternating current multilevel power converters. The implementation of this technique with an FPGA XC3S500E model is achieved in the Xilinx Spartan-3E FPGA platforms. An experimental prototype is implemented by 3-cascaded H-bridges controlled by the DSPWM multilevel technique, generating high efficiency, low cost, and lower harmonic content. The efficiency of the DSPWM multilevel technique using R, RL, RC, and RLC loads connected to the power network is verified.

ORCID iDs

Salgado-Herrera, N.M., Medina-Ríos, J. Aurelio, Tapia‐Sánchez, Roberto, Anaya-Lara, Olimpo ORCID logoORCID: https://orcid.org/0000-0001-5250-5877 and Rodríguez‐Rodríguez, Ramon;
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