Improving fault location by analysis of electric parameters during circuit breaker operation
Ji, Liang and Booth, Campbell and Dysko, Adam and Kawano, Fumio and Baber, Gareth (2011) Improving fault location by analysis of electric parameters during circuit breaker operation. In: Power Systems Computation Conference (PSCC), 2011-08-22 - 2011-08-26.
Full text not available in this repository.Request a copyAbstract
This paper describes a novel concept of a single-ended impedance based fault location method using analysis of ‘interpole’ states which arise during operation of the circuit breaker as individual poles open sequentially. A fault location estimation algorithm, using the data gathered during the interpole states, is developed and presented in the paper. The proposed fault location technique has been shown to have a very high theoretical accuracy. Not only does it eliminate the negative effects associated with conventional single-ended methods, but it can also quantify other factors associated with the fault, i.e. fault resistance and remote source impedance. Additionally, it is economical as it is relatively easy to implement on a standard relaying hardware platform. This proposed method has been implemented and is demonstrated using a MATLAB simulation model. Results are reported and discussed in this paper, along with an overview of ongoing and future work.
ORCID iDs
Ji, Liang, Booth, Campbell ORCID: https://orcid.org/0000-0003-3869-4477, Dysko, Adam ORCID: https://orcid.org/0000-0002-3658-7566, Kawano, Fumio and Baber, Gareth;-
-
Item type: Conference or Workshop Item(Paper) ID code: 37897 Dates: DateEvent22 August 2011PublishedSubjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 27 Feb 2012 09:25 Last modified: 11 Nov 2024 16:33 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/37897