An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter

Zhang, Huibin and Finney, S.J. and Massoud, A. and Williams, B.W. (2008) An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter. IEEE Transactions on Power Electronics, 23 (6). pp. 2694-2702. ISSN 0885-8993 (http://dx.doi.org/10.1109/TPEL.2008.2002820)

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Abstract

A requirement of the three-level neutral-point-clamped voltage source inverter, with or without a separately supporting dc link, is to maintain the balance of the two dc-link capacitor voltages. In this paper, balancing of the capacitor voltages for these two dc-link voltage source possibilities is analyzed and an algorithm is proposed to independently balance the capacitor voltages. The algorithm considers the average energy effect of each vector on capacitor voltage and the necessary optimal vector state sequence in each modulation cycle. The algorithm minimizes the voltage rating overheads of the hardware, reduces the voltage ripple, and attenuates the negative effects associated with dc-link voltage oscillations.

ORCID iDs

Zhang, Huibin, Finney, S.J. ORCID logoORCID: https://orcid.org/0000-0001-5039-3533, Massoud, A. and Williams, B.W.;
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