Gate driver circuit with all-magnetic isolation for cascode-connected SiC JFETs in a three-level T-type bridge-leg

McNeill, Neville and Vozikis, Dimitrios and Peña-Alzola, Rafael and Wang, Shuren and Pollock, Richard and Holliday, Derrick and Williams, Barry W. (2023) Gate driver circuit with all-magnetic isolation for cascode-connected SiC JFETs in a three-level T-type bridge-leg. Energies, 16 (3). 1226. ISSN 1996-1073 (https://doi.org/10.3390/en16031226)

[thumbnail of McNeil-etal-Energies-2023-Gate-driver-circuit-with-all-magnetic-isolation-for-cascode-connected-SiC-JFETs]
Preview
Text. Filename: McNeil_etal_Energies_2023_Gate_driver_circuit_with_all_magnetic_isolation_for_cascode_connected_SiC_JFETs.pdf
Final Published Version
License: Creative Commons Attribution 4.0 logo

Download (1MB)| Preview

Abstract

This article presents a gate driver circuit with all-magnetic isolation for driving silicon carbide (SiC) power devices in a three-level T-type bridge-leg. Gate driver circuitry for SiC devices has to be tolerant of rapid common-mode voltage changes. With respect to the resultant potentially problematic common-mode current paths, an arrangement of transformers is proposed for supplying the power devices with drive signals and power for their local floating gate driver circuits. The high-frequency carrier phase-switching technique is used to reduce the number of transformers. Signal timing and other implementation issues are addressed when using this arrangement with the T-type converter. The circuit is demonstrated in a 540 V bridge-leg constructed around 650 V and 1200 V cascode-connected normally-on SiC junction field effect transistors (JFETs).

ORCID iDs

McNeill, Neville, Vozikis, Dimitrios ORCID logoORCID: https://orcid.org/0000-0002-7196-0442, Peña-Alzola, Rafael, Wang, Shuren ORCID logoORCID: https://orcid.org/0000-0002-2311-3652, Pollock, Richard, Holliday, Derrick ORCID logoORCID: https://orcid.org/0000-0002-6561-4535 and Williams, Barry W.;