Characterization of time delay in power hardware in the loop setups

Guillo-Sansano, E. and Syed, M. H. and Roscoe, A. J. and Burt, G. M. and Coffele, F. (2021) Characterization of time delay in power hardware in the loop setups. IEEE Transactions on Industrial Electronics, 68 (3). pp. 2703-2713. ISSN 0278-0046 (https://doi.org/10.1109/TIE.2020.2972454)

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Abstract

The testing of complex power components by means of power hardware in the loop (PHIL) requires accurate and stable PHIL platforms. The total time delay typically present within these platforms is commonly acknowledged to be an important factor to be considered due to its impact on accuracy and stability. However, a thorough assessment of the total loop delay in PHIL platforms has not been performed in the literature. Therefore, time delay is typically accounted for as a constant parameter. However, with the detailed analysis of the total loop delay performed in this article, variability in time delay has been detected as a result of the interaction between discrete components. Furthermore, a time delay characterization methodology (which includes variability in time delay) has been proposed. This will allow for performing stability analysis with higher precision as well as to perform accurate compensation of these delays. The implications on stability and accuracy that the time delay variability can introduce in PHIL simulations has also been studied. Finally, with an experimental validation procedure, the presence of the variability and the effectiveness of the proposed characterization approach have been demonstrated.

ORCID iDs

Guillo-Sansano, E. ORCID logoORCID: https://orcid.org/0000-0002-2773-4157, Syed, M. H. ORCID logoORCID: https://orcid.org/0000-0003-3147-0817, Roscoe, A. J., Burt, G. M. ORCID logoORCID: https://orcid.org/0000-0002-0315-5919 and Coffele, F. ORCID logoORCID: https://orcid.org/0000-0002-5929-8441;
  • Item type:Article
    ID code:71223
    Dates:
    Date
    Event
    31 March 2021
    Published
    20 February 2020
    Published Online
    18 January 2020
    Accepted
    9 July 2019
    Submitted
    Notes:© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:28 Jan 2020 10:21
    Last modified:21 Nov 2024 01:15
    URI:https://strathprints.strath.ac.uk/id/eprint/71223
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