Physical hardware-in-the-loop modelling and simulation
Roscoe, Andrew and Guillo-Sansano, Efren and Burt, Graeme; Liu, Chen-Ching, ed. (2016) Physical hardware-in-the-loop modelling and simulation. In: Smart Grid Handbook. John Wiley & Sons Inc.. ISBN 978-1-118-75548-8
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It is too risky to install a newly-designed device, component, or controller, directly into a real power system without rigorous testing. To help to de-risk the system integration, and to assist in the design process, computer simulation is an accepted and widely-adopted tool. However, in a simulation-only environment, many real-world issues such as noise, randomness of event timings, and hardware design issues are not well explored. In addition, there are limits on the size and fidelity of system which can be simulated, due to the required computational intensity, and because control systems for devices often contain software which is proprietary and cannot be modelled accurately. Physical Hardware in the Loop Simulation provides an interim stage between purely computer-based simulation, and real device deployment. Part of the power system (or “Smart Grid”) is simulated, but specific components are implemented in actual hardware. The hardware may consist of instrumentation, relays or controllers, carrying no primary current. Such testing is termed “Secondary Hardware-in-the-Loop”, as the signals exchanged between the simulation and hardware consist only of measurements and control values. A more advanced environment is created where primary power flow is exchanged with the hardware. This is termed “Primary Hardware-in-the-Loop” or “Power Hardware-in-the-Loop” testing. In addition to measurement and control signals being exchanged with the simulation, an interface is required at which primary power is exchanged between the simulation and the hardware, at the voltage and current levels suitable for the hardware under test. Creation of such environments is complex, but allows steady-state, dynamic, and worst-case scenarios to be re-created in a controlled environment. Therefore hardware-in-the-loop testing offers a cheaper, safer, faster and more comprehensive de-risking process than trying the hardware for the first time on a real network. The complexity and interconnected nature of the Smart Grid means that such Hardware in the Loop based testing is becoming even more critical to understanding the behaviour of systems and schemes, and consequently the safe and secure introduction of new technologies.
ORCID iDs
Roscoe, Andrew ORCID: https://orcid.org/0000-0003-1108-4265, Guillo-Sansano, Efren ORCID: https://orcid.org/0000-0002-2773-4157 and Burt, Graeme ORCID: https://orcid.org/0000-0002-0315-5919; Liu, Chen-Ching-
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Item type: Book Section ID code: 56044 Dates: DateEvent1 June 2016PublishedSubjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 31 Mar 2016 10:27 Last modified: 11 Nov 2024 15:01 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/56044