Continued operation of multi-terminal HVDC networks based on modular multilevel converters

Ased, G.P. and Li, R. and Holliday, D. and Finney, S. and Xu, L. and Williams, B.W. and Kuroda, K. and Yamamoto, R. and Ito, H. (2014) Continued operation of multi-terminal HVDC networks based on modular multilevel converters. In: Cigré International Symposium, 2015-05-27 - 2015-05-28, Lund University. (In Press)

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    Abstract

    A comprehensive study that explores the possibility of using passive networks and active converter control to facilitate continued operation of multi-terminal HVDC networks with minimum interruption during pole-to-pole dc short-circuit faults is presented. The primary objective of this study is to achieve continued operation of any multi-terminal HVDC network using relatively slow dc circuit breakers (with minimum operation time of 10ms), without over-stressing converter switches and without converter dc link voltages falling below the peak ac line voltage. The validity of the proposed method is confirmed using time-domain simulations. Results obtained from iterative simulations confirm the possibility of further extension of fault clearance time to more than 10ms, but at the expense of increased passive component size.

    Author(s):Ased, G.P. ORCID logoORCID: https://orcid.org/0000-0002-1263-9771, Li, R. ORCID logoORCID: https://orcid.org/0000-0003-1518-0617, Holliday, D. ORCID logoORCID: https://orcid.org/0000-0002-6561-4535, Finney, S. ORCID logoORCID: https://orcid.org/0000-0001-5039-3533, Xu, L. ORCID logoORCID: https://orcid.org/0000-0001-5633-7866, Williams, B.W., Kuroda, K., Yamamoto, R. and Ito, H.
    Item type:Conference or Workshop Item(Paper)
    ID code:52236
    Keywords:fault clearance times, modular multilevel converter, multi-terminal high-voltage dc network, pole-to-pole dc fault, Electrical engineering. Electronics Nuclear engineering, Electrical and Electronic Engineering
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:16 Mar 2015 08:57
    Last modified:04 Oct 2019 03:55
    Related URLs:
    URI:https://strathprints.strath.ac.uk/id/eprint/52236
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