High-speed resonant gate driver with controlled peak gate voltage for silicon carbide MOSFETs

Anthony, Philip and McNeill, Neville and Holliday, Derrick (2014) High-speed resonant gate driver with controlled peak gate voltage for silicon carbide MOSFETs. IEEE Transactions on Industry Applications, 50 (1). pp. 573-583. ISSN 0093-9994 (https://doi.org/10.1109/TIA.2013.2266311)

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Abstract

Parasitic inductance in the gate path of a silicon carbide MOSFET places an upper limit upon the switching speeds achievable from these devices, resulting in unnecessarily high switching losses due to the introduction of damping resistance into the gate path. A method to reduce switching losses is proposed, using a resonant gate driver to absorb parasitic inductance in the gate path, enabling the gate resistor to be removed. The gate voltage is maintained at the desired level using a feedback loop. Experimental results for a 1200-V silicon carbide MOSFET gate driver are presented, demonstrating the switching loss of 230 μJ at 800 V and 10 A. This represents a 20% reduction in switching losses in comparison to that of conventional gate drive methods.

ORCID iDs

Anthony, Philip, McNeill, Neville and Holliday, Derrick ORCID logoORCID: https://orcid.org/0000-0002-6561-4535;
  • Item type:Article
    ID code:48384
    Dates:
    Date
    Event
    16 January 2014
    Published
    5 June 2013
    Published Online
    13 March 2013
    Accepted
    Keywords:driver circuits, power MOSFET, silicon compounds, parasitic inductance, power FETs, Electrical Engineering. Electronics Nuclear Engineering, Industrial and Manufacturing Engineering, Control and Systems Engineering, Electrical and Electronic Engineering
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:02 Jun 2014 10:48
    Last modified:17 Jul 2023 07:30
    URI:https://strathprints.strath.ac.uk/id/eprint/48384
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