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Driving innovations in manufacturing: Open Access research from DMEM

Strathprints makes available Open Access scholarly outputs by Strathclyde's Department of Design, Manufacture & Engineering Management (DMEM).

Centred on the vision of 'Delivering Total Engineering', DMEM is a centre for excellence in the processes, systems and technologies needed to support and enable engineering from concept to remanufacture. From user-centred design to sustainable design, from manufacturing operations to remanufacturing, from advanced materials research to systems engineering.

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HVDC Network : DC fault ride-through improvement

Adam, G.P. and Kalcon, G. and Finney, S.J. and Holliday, D. and Anaya-Lara, O. and Williams, B.W. (2011) HVDC Network : DC fault ride-through improvement. In: CIGRE 2011, 2011-09-06 - 2011-09-08.

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Abstract

This paper compares the transient behaviour of two HVDC networks with similar structures but which use different converter topologies, namely two-level and H-bridge modular multilevel converters. The key objective of this comparison is to show that the use of HVDC converters that inherent dc fault reversed blocking capability is beneficial to the HVDC networks in term of dc fault ride-through capability improvement (may reduce the risk of converter stations damage from over-current during dc side faults). The improvement in the HVDC network dc fault ride-through capability is achieved by stopping grid contribution to the fault current, and minimization of the transient component due to discharge of the dc side capacitors. Therefore HVDC networks that use converter stations with dc fault reversed blocking capability are expected to recover swiftly from dc side faults compared to those using converter stations without dc fault reversed blocking capability. To illustrate the outcomes of this comparison, the responses of both HVDC networks are examined when subjected to dc side faults. Issues such as lead-through and inrush currents in the ac and dc sides during and following dc faults are discussed.