Quasi two-level operation of a five-level inverter
Adam, G.P. and Finney, S.J. and Williams, B.W. (2007) Quasi two-level operation of a five-level inverter. In: Proceedings of Compatibility in Power Electronics, 2007. IEEE, pp. 1-6. ISBN 1-4244-1055-X
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In this paper a five-level inverter operational mode termed quasi two-level operation is proposed. The multilevel capacitors function in a soft clamping mode where capacitor voltage balancing is maintained by varying the transient dwell time at each level. Two balancing techniques are proposed. The first is based on the selection of suitable resistors to be connected across each dc link capacitor in order to maintain balance. The second method is based on varying the dwell time at the intermediate nodes of the dc link capacitors. The validity of the operational mode and the two proposed balancing techniques are confirmed by simulations and experiments.
Author(s): | Adam, G.P., Finney, S.J. and Williams, B.W. | Item type: | Book Section |
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ID code: | 36553 |
Keywords: | capacitors, circuits, clamps, diodes, pulse width modulation inverters , resistors, Electrical engineering. Electronics Nuclear engineering |
Subjects: | Technology > Electrical engineering. Electronics Nuclear engineering |
Department: | Faculty of Engineering > Electronic and Electrical Engineering |
Depositing user: | Pure Administrator |
Date deposited: | 22 Dec 2011 14:57 |
Last modified: | 03 Jan 2019 12:50 |
URI: | https://strathprints.strath.ac.uk/id/eprint/36553 |
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