Quasi two-level operation of a five-level inverter

Adam, G.P. and Finney, S.J. and Williams, B.W.; (2007) Quasi two-level operation of a five-level inverter. In: Proceedings of Compatibility in Power Electronics, 2007. IEEE, POL, pp. 1-6. ISBN 1-4244-1055-X (https://doi.org/10.1109/CPE.2007.4296557)

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Abstract

In this paper a five-level inverter operational mode termed quasi two-level operation is proposed. The multilevel capacitors function in a soft clamping mode where capacitor voltage balancing is maintained by varying the transient dwell time at each level. Two balancing techniques are proposed. The first is based on the selection of suitable resistors to be connected across each dc link capacitor in order to maintain balance. The second method is based on varying the dwell time at the intermediate nodes of the dc link capacitors. The validity of the operational mode and the two proposed balancing techniques are confirmed by simulations and experiments.

ORCID iDs

Adam, G.P. ORCID logoORCID: https://orcid.org/0000-0002-1263-9771, Finney, S.J. ORCID logoORCID: https://orcid.org/0000-0001-5039-3533 and Williams, B.W.;
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