Improved functional simulation of dynamically reconfigurable logic
Robertson, I. and Irvine, J. and Lysaght, P. and Robinson, D.; (2002) Improved functional simulation of dynamically reconfigurable logic. In: Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. Lecture Notes in Computer Science, 2438 . Springer, pp. 152-161. ISBN 978-3-540-44108-3 (http://dx.doi.org/0.1007/3-540-46117-5_17)
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Several techniques to simulate dynamically reconfigurable logic (DRL) have been published during the last decade. These methods each have their own strengths and weaknesses, and perform well when used under particular circumstances. This paper introduces a revised version of dynamic circuit switching (DCS), a DRL simulation technique reported previously, which improves the accuracy of the simulation models and extends the range of situations to which they can be applied. The internal state of dynamic tasks that contain memory elements can change when they are reconfigured. Modelling this presents a further simulation requirement. The paper indicates how this can be achieved by including the ideas behind another simulation technique, clock morphing, in the methodology. Finally, the run-time overheads introduced by the technique are analysed.
ORCID iDs
Robertson, I., Irvine, J. ORCID: https://orcid.org/0000-0003-2078-6517, Lysaght, P. and Robinson, D.;-
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Item type: Book Section ID code: 23244 Dates: DateEvent2002PublishedNotes: Paper presented at 12th International Conference on Field Programmable Logic and Application, 2-4 Sept 2002, Montpellier, France. Subjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Strathprints Administrator Date deposited: 13 Jul 2010 15:45 Last modified: 11 Nov 2024 14:39 URI: https://strathprints.strath.ac.uk/id/eprint/23244