Systematic design of the lead-lag network method for active damping in LCL-filter based three phase converters

Peña-Alzola, Rafael and Liserre, Marco and Blaabjerg, Frede and Sebastián, Rafael and Dannehl, Jörg and Fuchs, Friedrich Wilhelm (2014) Systematic design of the lead-lag network method for active damping in LCL-filter based three phase converters. IEEE Transactions on Industrial Informatics, 10 (1). pp. 43-52. ISSN 1551-3203 (https://doi.org/10.1109/TII.2013.2263506)

[thumbnail of Pena-Alzola-etal-IEEE-TOII-2014-Systematic-design-of-the-lead-lag-network]
Preview
 Text. Filename: Pena_Alzola_etal_IEEE_TOII_2014_Systematic_design_of_the_lead_lag_network.pdf
Accepted Author Manuscript
Download (715kB)| Preview

Abstract

Three-phase active rectifiers guarantee sinusoidal input currents and unity power factor at the price of a high switching frequency ripple. To adopt an LCL-filter, instead of an $L$-filter, allows using reduced values for the inductances and so preserving dynamics. However, stability problems can arise in the current control loop if the present resonance is not properly damped. Passive damping simply adds resistors in series with the LCL-filter capacitors. This simplicity is at the expense of increased losses and encumbrances. Active damping modifies the control algorithm to attain stability without using dissipative elements but, sometimes, needing additional sensors. This solution has been addressed in many publications. The lead-lag network method is one of the first reported procedures and continues being in use. However, neither there is a direct tuning procedure (without trial and error) nor its rationale has been explained. Thus, in this paper a straightforward procedure is developed to tune the lead-lag network with the help of software tools. The rationale of this procedure, based on the capacitor current feedback, is elucidated. Stability is studied by means of the root locus analysis in $z$-plane. Selecting the lead-lag network for the maximum damping in the closed-loop poles uses a simple optimization algorithm. The robustness against the grid inductance variation is also analyzed. Simulations and experiments confirm the validity of the proposed design flow.

  • Item type:Article
    ID code:70301
    Dates:
    Date
    Event
    28 February 2014
    Published
    16 May 2013
    Published Online
    15 March 2013
    Accepted
    Notes:© 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:28 Oct 2019 10:06
    Last modified:05 Nov 2024 02:48
    Related URLs:
    URI:https://strathprints.strath.ac.uk/id/eprint/70301
CORE (COnnecting REpositories)