Gallium nitride micro-LED drive circuits for visible light communications

Herrnsdorf, Johannes and McKendry, Jonathan and Griffiths, Alexander and Strain, Michael and Henderson, Robert and Dawson, Martin (2019) Gallium nitride micro-LED drive circuits for visible light communications. In: 13th International Conference on Nitride Semiconductors (ICNS-13), 2019-07-07 - 2019-07-12, Hyatt Regency Bellevue.

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Gallium Nitride light-emitting diodes with a size of a few 10’s of microns or less (referred to as ‘micro-LEDs’) have electrical-to-optical modulation bandwidths of up to 800 MHz and are therefore attractive for optical communications at Gb/s data rates [1]. At such high frequencies, the electronic drivers and interfaces to the micro-LEDs need careful attention. The dependence of the micro-LEDs’ impedance on bias current and signal frequency are presented followed by a discussion of the integration with application-specific integrated circuits (ASICs) that enable digital control. The impedance of micro-LEDs was assessed using an impedance analyser for frequencies up to 5 MHz and by assessing the response to 150-picosecond voltage pulses. A complex dependence on bias current density and modulation frequency was found. At frequencies up to a few 100 MHz, the bias-dependence of the impedance follows the so-called ‘negative capacitance’ behaviour that is common to many semiconductor devices [2]. Despite this complication, the measured values are consistent with the view that the bandwidth of micro-LEDs is limited by carrier lifetime rather than the device capacitance. At GHz frequencies, the impedance is dominated by several resonances, which make it difficult to design efficient impedance matching circuits using passive components. The frequency and current domain at which micro-LEDs operate in visible light communications are well-matched by n-type complementary metal-oxide semiconductor (CMOS) driver ASICs. However, n-type CMOS requires the micro-LEDs to be driven through their cathodes, which has important consequences for device layout and fabrication. Due to the poor conductivity of p-type GaN, the epitaxial structure is invariably grown with the p-type layer on top, which means that the LED cathodes need to be accessed by plasma etching and carefully laid out metal tracks. N-type CMOS is therefore suited for driving modest numbers of micro-LEDs at very high speeds, enabling multiple Gb/s data rates which were demonstrated in a multiple input-multiple-output system [3]. P-type CMOS, on the other hand, has good properties for pitch-matched driver arrays that are flip-chip bonded to high-density micro-LED arrays. In this case, the modulation rates across the entire array are limited by the throughput of digital data that the ASIC can handle. Efficient external interfaces are being prototyped using field-programmable gate arrays, which have proven crucial to accessing the full array resolution at the speeds (potentially MHz) that are possible in principle. A further challenge in high-density arrays is the uniform distribution of current across all pixels. The driver chip needs to have a good power distribution network to the pixel drivers, and the LED array layout needs to consider current crowding effects [4]. Uniform current distribution is easier to achieve at modest current densities and, in addition, the overall current is often constrained through the current carrying capability of wire bonds and metal tracks. Therefore, the individual pixels in high-density arrays tend to be driven at both lower current densities and lower modulation speeds than the few-pixel devices that were matched to high-speed n-type drivers. Such devices have been used in digital environments that employ structured illumination [5]. In summary, micro-LEDs have a complicated dynamic electrical response, however, at sub-GHz frequencies, simple direct electronic interfacing is justified. Arrays with small numbers of micro-LEDs operating at high frequencies can be interfaced with n-type CMOS ASICs, while larger arrays of densely packed micro-LEDs can be interfaced with a pitch-matched array of p-type CMOS drivers. [1] Rajbhandari et al., SST 32, 023001 (2017) [2] Yang et al., JAP 116, 044512 (2014) [3] Rajbhandari et al., JLT 35, 4358 (2017) [4] Herrnsdorf et al., TED 62, 1918 (2015) [5] Herrnsdorf et al., JLT 35, 2339 (2017)