Auto-updating of sampling time redesign for system identification under parameter uncertainty
Wang, Ke and Yue, Hong; (2019) Auto-updating of sampling time redesign for system identification under parameter uncertainty. In: 2019 25th International Conference on Automation and Computing (ICAC). IEEE, GBR, pp. 169-174. ISBN 9781861376657 (https://doi.org/10.23919/IConAC.2019.8895129)
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Abstract
In this paper, the mid-term experimental redesign of sampling strategy has been studied to improve design robustness under model uncertainties. With this method, the whole design time horizon is divided into several zones. Parameter estimation is made with the data in each zone and the updated model is used for experimental design in the next zone until the experiment is complete. A novel auto-updating strategy is developed to determine the length of each zone to assure the identifiability for parameter estimation. No pre-settings from users are required as in previous redesign algorithms. Simulation studies on an enzyme reaction system have been conducted. The results demonstrate that, compared to the conventional offline design and the standard online redesign methods, the proposed mid-term redesign with auto-updating of zones produces data that lead to more accurate parameter identification under large uncertainties.
ORCID iDs
Wang, Ke and Yue, Hong ORCID: https://orcid.org/0000-0003-2072-6223;-
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Item type: Book Section ID code: 68994 Dates: DateEvent11 November 2019Published21 June 2019Accepted20 May 2019SubmittedNotes: © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Subjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 24 Jul 2019 10:58 Last modified: 11 Nov 2024 15:20 URI: https://strathprints.strath.ac.uk/id/eprint/68994