A predictive control strategy for mitigation of commutation failure in LCC-based HVDC systems

Mirsaeidi, Sohrab and Dong, Xinzhou and Tzelepis, Dimitrios and Mat Said, Dalila and Dysko, Adam and Booth, Campbell (2019) A predictive control strategy for mitigation of commutation failure in LCC-based HVDC systems. IEEE Transactions on Power Electronics, 34 (1). pp. 160-172. 8327514. ISSN 0885-8993 (https://doi.org/10.1109/TPEL.2018.2820152)

[thumbnail of Mirsaeidi-etal-IEEE-TOPE-2018-A-predictive-control-strategy-for-mitigation-of-commutation]
Preview
 Text. Filename: Mirsaeidi_etal_IEEE_TOPE_2018_A_predictive_control_strategy_for_mitigation_of_commutation.pdf
Accepted Author Manuscript
Download (6MB)| Preview

Abstract

High-voltage direct-current (HVDC) systems are being widely employed in various applications because of their numerous advantages such as bulk power transmission, efficient long-distance transmission, and flexible power-flow control. However, line-commutated-converter-based HVDC systems suffer from commutation failure, which is a major drawback, leading to increased device stress and interruptions in transmitted power. This paper proposes a predictive control strategy, deploying a commutation failure prevention module to mitigate the commutation failures during ac system faults. The salient feature of the proposed strategy is that it has the ability to temporarily decrease the firing angle of thyristor valves depending on the fault intensity to ensure a sufficient commutation margin. In order to validate the performance of the proposed strategy, several simulations have been conducted on the CIGRE Benchmark HVDC model using PSCAD/EMTDC software. Additionally, practical performance and feasibility of the proposed strategy are evaluated through laboratory testing, using the real-time Opal-RT hardware prototyping platform. Simulation and experimental results demonstrate that the proposed strategy can effectively inhibit the commutation failure or repetitive commutation failures under different fault types, fault impedances, and fault initiation times.

ORCID iDs

Mirsaeidi, Sohrab, Dong, Xinzhou, Tzelepis, Dimitrios ORCID logoORCID: https://orcid.org/0000-0003-4263-7299, Mat Said, Dalila, Dysko, Adam ORCID logoORCID: https://orcid.org/0000-0002-3658-7566 and Booth, Campbell ORCID logoORCID: https://orcid.org/0000-0003-3869-4477;
  • Item type:Article
    ID code:63709
    Dates:
    Date
    Event
    1 January 2019
    Published
    28 March 2018
    Published Online
    26 March 2018
    Accepted
    Notes:© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
    Subjects:Technology > Electrical engineering. Electronics Nuclear engineering
    Department:Faculty of Engineering > Electronic and Electrical Engineering
    Depositing user: Pure Administrator
    Date deposited:12 Apr 2018 14:19
    Last modified:11 Nov 2024 11:57
    URI:https://strathprints.strath.ac.uk/id/eprint/63709
CORE (COnnecting REpositories)