Comparison of 2 V organic thin-film transistors fabricated on free-standing commercial PEN foils
Hannah, Stuart and Gleskova, Helena (2015) Comparison of 2 V organic thin-film transistors fabricated on free-standing commercial PEN foils. In: innoLAE 2015, 2015-02-03 - 2015-02-04, Downing College, Cambridge.
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Abstract
The large-area, roll-to-roll (R2R) fabrication of organic thin-film circuits on plastic foils demands low-cost manufacturing and the integration of devices onto flexible plastic substrates. We have developed a fully dry process [1] to fabricate low-voltage organic thin-film transistors (OTFTs) with 10-nm thick dielectric amenable to R2R processing. Two commercially available polyethylene naphthalate (PEN) plastic foils (DuPont Teijin [2]) were compared for use as possible flexible substrates. Teonex Q65FA features an adhesive layer on the bottom side to prevent its slippage during the R2R process, while Optfine PQA1 includes a planarisation layer on the top (device) side. The PEN films were pre-annealed at 160°C for 24 hours prior to OTFT fabrication. 160°C is the maximum temperature used in our OTFT fabrication process and the pre-annealing should mitigate the layer-to-layer misalignment during the OTFT fabrication. Teonex Q65FA remained flat after the pre-annealing step, while the radius of curvature of Optfine PQA1 changed from 17 cm to 1.5 cm after the anneal. Consequently, we fabricated Al/AlOx/C8PA/DNTT/Au and Al/AlOx/DNTT/Au OTFTs on non-annealed Optfine and pre-annealed Teonex foils. Dinaphthothienothiophene (DNTT) was chosen due to its excellent air-stability and the addition of n-octylphosphonic acid (C8PA) improves its growth. 15 nm of DNTT was deposited at room temperature at rates of 0.4 Å/s and 0.6 Å/s on the Teonex and Optfine, respectively. The initial OTFT performance was evaluated by measuring the transfer characteristics between 0 and −2 V and extracting the field-effect mobility, threshold voltage, subthreshold slope, etc. Bias stress was performed approximately one week after the initial measurements at a gate voltage of −2 V while the source and drain were grounded. Referring to Table 1, one week of storage in vacuum between the initial and bias stress measurements, led to a reduction in OTFT threshold voltage and an increase in the mobility and the OFF-current. Figure 1 shows the as-fabricated OTFT parameters extracted from transfer characteristics measured at a drain voltage of −2 V. For both PEN substrates tested, the inclusion of the C8PA monolayer increases field-effect mobility, ON-current and ON/OFF-current ratio and reduces subthreshold slope and OFF-current. The substrates affect OTFT performance in a mixed way. Comparing OTFTs with C8PA monolayer Teonex PEN has a slightly lower subthreshold slope and OFF-current than the Optfine PEN film. However, the Optfine film exhibits about a factor of three higher field-effect mobility (0.14 cm2/Vs) and about an order of magnitude higher ON-current. The OTFTs on Optfine PEN substrate also appear to remain more stable after the application of bias stress in terms of mobility, even though their threshold voltage at the beginning of the bias stress was −0.4 V lower than that of OTFTs fabricated on Teonex PEN. In conclusion, Teonex PEN was found to be easier to handle, since it remained flat upon heating at 160°C. However, the AlOx/C8PA transistors exhibited about a factor of three lower field-effect mobility when compared to Optfine PEN OTFTs. The planarisation layer on Optfine PEN leads to improved OTFT mobility compared to Teonex PEN; however the Optfine PEN curved significantly upon heating and therefore presents a significant challenge if used as a free-standing substrate with our OTFT fabrication procedure.
ORCID iDs
Hannah, Stuart ORCID: https://orcid.org/0000-0001-5620-9899 and Gleskova, Helena ORCID: https://orcid.org/0000-0001-7195-9639;-
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Item type: Conference or Workshop Item(Poster) ID code: 57137 Dates: DateEvent3 February 2015PublishedSubjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 27 Jul 2016 11:05 Last modified: 14 Dec 2024 01:43 Related URLs: URI: https://strathprints.strath.ac.uk/id/eprint/57137