Tapered sidewall dry etching process for GaN and its applications in device fabrication

Choi, H.W. and Jeon, C.W. and Dawson, M.D. (2005) Tapered sidewall dry etching process for GaN and its applications in device fabrication. Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 23 (1). pp. 99-102. ISSN 1071-1023 (http://dx.doi.org/10.1116/1.1839914)

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Abstract

A method of etching which allows the direct interconnection of multiple GaN-based devices is introduced. The mesa structures of devices are etched using an isotropic recipe which produces tapered sidewalls. The degree of inclination can be readily controlled through various etching parameters, which include the inductively coupled plasma power, plate power, and pressure, thus modifying the vertical and lateral etch components. This approach has been successfully adopted in the fabrication of interconnected and matrix-addressable microlight-emitting diodes, and offers superior optical and electrical performance and a high degree of uniformity compared to similar devices fabricated using conventional processes.

ORCID iDs

Choi, H.W., Jeon, C.W. and Dawson, M.D. ORCID logoORCID: https://orcid.org/0000-0002-6639-2989;
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