Hardware emulation of a network on chip architecture based on a clockwork routed manhattan street network

Oommen, K. and Harle, D.A. (2005) Hardware emulation of a network on chip architecture based on a clockwork routed manhattan street network. In: International Conference on Field Programmable Logic and Applications, 2005, 2005-08-24 - 2005-08-26. (https://doi.org/10.1109/FPL.2005.1515828)

Abstract

This paper looks at hardware emulation of a network on chip architecture based on a clockwork routed manhattan street network

ORCID iDs

Harle, D.A. ORCID: https://orcid.org/0000-0002-0534-1096

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• Item metadata

  Item type:	Conference or Workshop Item(Paper)
  ID code:	37992
  Dates:	Date Event August 2005 Published
  Subjects:	Technology > Electrical engineering. Electronics Nuclear engineering
  Department:	Faculty of Engineering > Electronic and Electrical Engineering
  Depositing user:	Pure Administrator
  Date deposited:	28 Feb 2012 16:27
  Last modified:	11 Nov 2024 16:18
  URI:	https://strathprints.strath.ac.uk/id/eprint/37992