Mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system

Eltahir, M. and Dunlop, J. (2001) Mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system. In: EPMCC 01, 2001-02-20 - 2001-02-22.

Abstract

This paper looks at the mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system

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• Item metadata

  Item type:	Conference or Workshop Item(Paper)
  ID code:	37665
  Dates:	Date Event February 2001 Published
  Keywords:	mapping, 2.5/3g standards, virtual bus architecture, hierarchical cellular System, Electrical Engineering. Electronics Nuclear Engineering
  Subjects:	Technology > Electrical engineering. Electronics Nuclear engineering
  Department:	Faculty of Engineering > Electronic and Electrical Engineering
  Depositing user:	Pure Administrator
  Date deposited:	14 Feb 2012 16:46
  Last modified:	18 Jan 2023 12:54
  URI:	https://strathprints.strath.ac.uk/id/eprint/37665