RAID 6 hardware acceleration
Gilroy, M.P. and Irvine, J. (2006) RAID 6 hardware acceleration. In: International Conference on Field Programmable Logic and Applications, 2006. FPL '06., 2006-08-28 - 2006-08-30. (https://doi.org/10.1109/FPL.2006.311196)
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Hard disk storage capacity has continued to rise whilst at the same time the cost per megabyte continues to fall. This, combined with increased usage of digital storage for documents, photography and video for both home and business use has led to increased need for reliable data storage system. Redundant arrays of inexpensive disks (RAID) have proven to offer the best characteristics for reliable storage. However, to date RAID based systems have been limited, due to cost and circuit complexity, by their support for only single disk erasure tolerance. FPGAs allow us to overcome these difficulties and allow support for more complex storage algorithms. This paper introduces an efficient FPGA based hardware RAID 6 accelerator providing uninterrupted access during all single and double disk erasures and recovery
ORCID iDs
Gilroy, M.P. and Irvine, J. ORCID: https://orcid.org/0000-0003-2078-6517;-
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Item type: Conference or Workshop Item(Paper) ID code: 37304 Dates: DateEventAugust 2006PublishedSubjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 02 Feb 2012 01:06 Last modified: 11 Nov 2024 16:21 URI: https://strathprints.strath.ac.uk/id/eprint/37304