An FPGA implementation of pattern-Selective pyramidal image fusion
Sims, O.N. and Irvine, J. (2007) An FPGA implementation of pattern-Selective pyramidal image fusion. In: 16th International Conference on Field Programmable Logic and Applications, 2006-08-28 - 2006-08-30, Madrid. (http://dx.doi.org/10.1109/FPL.2006.311296)
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Abstract
The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4
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Item type: Conference or Workshop Item(Paper) ID code: 37150 Dates: DateEvent16 May 2007PublishedKeywords: field programmable gate arrays, image fusion, video streaming , data mining , feature extraction , image representation , Electrical engineering. Electronics Nuclear engineering Subjects: Technology > Electrical engineering. Electronics Nuclear engineering Department: Faculty of Engineering > Electronic and Electrical Engineering Depositing user: Pure Administrator Date deposited: 27 Jan 2012 14:30 Last modified: 19 Sep 2018 20:03 URI: https://strathprints.strath.ac.uk/id/eprint/37150