Picture of Open Access badges

Discover Open Access research at Strathprints

It's International Open Access Week, 24-30 October 2016. This year's theme is "Open in Action" and is all about taking meaningful steps towards opening up research and scholarship. The Strathprints institutional repository is a digital archive of University of Strathclyde research outputs. Explore recent world leading Open Access research content by University of Strathclyde researchers and see how Strathclyde researchers are committing to putting "Open in Action".


Image: h_pampel, CC-BY

A domain partition model approach to the online fault recovery of FPGA-based reconfigurable systems

Shang, L. H. and Zhou, M. and Hu, Y. and Yang, E. F. (2011) A domain partition model approach to the online fault recovery of FPGA-based reconfigurable systems. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E94A (1). pp. 290-299. ISSN 0916-8508

Full text not available in this repository. (Request a copy from the Strathclyde author)


Field programmable gate arrays (FPGAs) are widely used in reliability-critical systems due to their reconfiguration ability. However, with the shrinking device feature size and increasing die area, nowadays FPGAs can be deeply affected by the errors induced by electromigration and radiation. To improve the reliability of FPGA-based reconfigurable systems, a permanent fault recovery approach using a domain partition model is proposed in this paper. In the proposed approach, the fault-tolerant FPGA recovery from faults is realized by reloading a proper configuration from a pool of multiple alternative configurations with overlaps. The overlaps are presented as a set of vectors in the domain partition model. To enhance the reliability, a technical procedure is also presented in which the set of vectors are heuristically filtered so that the corresponding small overlaps can be merged into big ones. Experimental results are provided to demonstrate the effectiveness of the proposed approach through applying it to several benchmark circuits. Compared with previous approaches, the proposed approach increased MTTF by up to 18.87%.