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The use of real time digital simulation and hardware in the loop to de-risk novel control algorithms

Loddick, S. and Mupambireyi, U. and Blair, S. and Booth, C. and Li, X. and Roscoe, A. and Daffey, K. and Watson, J. (2011) The use of real time digital simulation and hardware in the loop to de-risk novel control algorithms. [Proceedings Paper]

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    Abstract

    Low power demonstrators are commonly used to validate novel control algorithms. However, the response of the demonstrator to network transients and faults is often unexplored. The importance of this work has, in the past, justified facilities such as the T45 Shore Integration Test Facility (SITF) at the Electric Ship Technology Demonstrator (ESTD). This paper presents the use of real time digital simulation and hardware in the loop to de-risk a innovative control algorithm with respect to network transients and faults. A novel feature of the study is the modelling of events at the power electronics level (time steps of circa 2 μs) and the system level (time steps of circa 50 μs).

    Item type: Proceedings Paper
    ID code: 33376
    Keywords: propulsion, real time systems, software, hardware, transient analysis, Electrical engineering. Electronics Nuclear engineering
    Subjects: Technology > Electrical engineering. Electronics Nuclear engineering
    Department: Faculty of Engineering > Electronic and Electrical Engineering
    Related URLs:
    Depositing user: Pure Administrator
    Date Deposited: 28 Sep 2011 14:29
    Last modified: 28 Mar 2014 11:17
    URI: http://strathprints.strath.ac.uk/id/eprint/33376

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