Physically based simulation of electromigration-induced hillock and void evolution in Cu interconnects with grain morphology considerations

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Jiang, Han and Liang, Shuibao and Ramachandran, Saran and Xu, Yaohua (2025) Physically based simulation of electromigration-induced hillock and void evolution in Cu interconnects with grain morphology considerations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ISSN 1937-4151 (https://doi.org/10.1109/TCAD.2025.3644291)

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Abstract

Electromigration-induced hillocks and voids in Cu interconnects pose increasingly significant reliability challenges to microelectronic devices, as device scaling and current density continue to rise in advanced integrated circuits. These defects can cause critical short-circuit and open-circuit failures. However, the quantitative mechanisms governing these failure modes remain insufficiently understood, limiting the precise prediction of defect morphology and growth dynamics. In this work, we develop a physically based phase field model to investigate the formation and evolution of hillocks and voids in Cu interconnects under electric current stressing, incorporating the influence of grain morphology. Our results show that hillocks tend to form and grow on the anode side, with directional mass migration inducing voids on the cathode side, leading to increased electrical resistance and potential signal degradation. Interconnects with finer polycrystalline structures exhibit more rapid hillock and void growth, due to the increased number of grain boundaries that enhance atomic diffusion pathways. Hydrostatic stress not only flattens void morphology but also accelerates the growth of both hillocks and voids. The stress-driven diffusion flux flows into the hillock regions adjacent to the anode, promoting the formation of taller hillocks. The proposed model qualitatively reproduces key features observed in experimental studies, offering microstructure-aware insights into electromigration-induced failure mechanisms and providing a foundation for predictive reliability analysis and design optimization of Cu interconnects.

ORCID iDs

Jiang, Han, Liang, Shuibao, Ramachandran, Saran ORCID logoORCID: https://orcid.org/0000-0002-6881-2940 and Xu, Yaohua;
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