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Rapid prototyping of a test harness for forward error correcting codes

Irvine, James and Brown, E. and Wilkie, W. (2005) Rapid prototyping of a test harness for forward error correcting codes. In: FPGA '05 Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays, 2005-02-20 - 2005-02-22, Monterey, CA.

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Abstract

This paper presents a design flow for the rapid prototyping of forward error correction (FEC) systems in the Xilinx System Generator tool. In this instance two FEC systems were tested, both Turbo codec's. One was designed to comply with the UMTS standard, the other was designed to comply with the cdma2000 standard. The target hardware for this system is a Field Programmable Gate Array (FPGA). The System Generator tool and the cdma2000 Turbo code standard are discussed. A description of the implemented test harness is given along with simulation results and a comparison of simulation times for both hardware and software implementations of the system.

Item type: Conference or Workshop Item (Paper)
ID code: 9877
Notes: Published in: Proceeding FPGA '05 Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays ISBN:1-59593-029-9
Keywords: rapid prototyping, test harness, forward error correcting codes, forward error correction (FEC) systems, Field Programmable Gate Array (FPGA) , system generator tool, Electronic computers. Computer science, Electrical engineering. Electronics Nuclear engineering
Subjects: Science > Mathematics > Electronic computers. Computer science
Technology > Electrical engineering. Electronics Nuclear engineering
Department: Faculty of Engineering > Electronic and Electrical Engineering
Related URLs:
Depositing user: Strathprints Administrator
Date Deposited: 01 Aug 2011 16:29
Last modified: 04 Oct 2012 17:16
URI: http://strathprints.strath.ac.uk/id/eprint/9877

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