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World class computing and information science research at Strathclyde...

The Strathprints institutional repository is a digital archive of University of Strathclyde's Open Access research outputs. Strathprints provides access to thousands of Open Access research papers by University of Strathclyde researchers, including by researchers from the Department of Computer & Information Sciences involved in mathematically structured programming, similarity and metric search, computer security, software systems, combinatronics and digital health.

The Department also includes the iSchool Research Group, which performs leading research into socio-technical phenomena and topics such as information retrieval and information seeking behaviour.


Arithmetic implementation techniques and methodologies for 3G uplink reception in Xilinx FPGAs

MacPherson, K.N. and Stirling, I.G. and Rice, G. and Garcia-Alis, D. and Stewart, R.W. (2002) Arithmetic implementation techniques and methodologies for 3G uplink reception in Xilinx FPGAs. In: 3rd International Conference on 3G Mobile Communications Technologies, 2002-05-08 - 2002-05-10.

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DSP system-level design decisions can have significant effects on Field Programmable Gate Array (FPGA) hardware cost and efficiency. In this paper we demonstrate how modifymg filter coefficients and taking advantage of non-canonical implementation techniques can yield reduced FPGA hardware cost. Using the Root-Raised Cosine (RRC) pulse shaping filters required in the 3G uplink reception chain as an example, different implementation techniques are compared in terms of DSP system performance and FPGA cost. RRC filter performance is evaluated through simulation of the Adjacent Channel Selectivity (ACS) test. Simulation results are presented and the differing hardware structures are evaluated.