Hamid, M.S. and Marshall, S. (2003) FPGA realisation of the genetic algorithm for the design of grey scale soft morphological filters. In: Visual information engineering 2003. IEEE Conference Proceedings, New York, pp. 141-144. ISBN 0852967578
Full text not available in this repository. (Request a copy from the Strathclyde author)Abstract
Although soft morphological filters give excellent performance in restoring corrupted images, they are hard to design. One successful approach is to use iterative search methods such as genetic algorithms. However, they can be computationally exhaustive taking weeks to converge. Parallel genetic algorithms give massive reductions in processing time, but their performance when implemented on multiprocessor systems or cluster of workstations has a heavy dependence on the number of servers. Also, they require some sort of synchronisation between the working processors. Because of their parallel capabilities, field programmable gate arrays (FPGAs) provide a cheap and efficient way to implement parallel algorithms. In this paper, a realisation of the genetic algorithm on an FPGA is introduced. The genetic algorithm is given the task of optimising a grey-scale soft morphological filter. The soft morphological filter is implemented using a parallel quick sorting algorithm. The results of synthesizing and simulating the design on SPARTAN II FPGA resulted in a good utilisation of the device resources. Also, the optimisation process was performed in a very short time. In contrast with the standard parallel genetic algorithms, the design does not require any synchronisation or management schemes.
| Item type: | Book Section |
|---|---|
| ID code: | 39574 |
| Keywords: | fpga realisation, genetic algorthm, design, grey-scale, soft morphological filters, sorting , parallel algorithms , mathematical morphology, image restoration , Electrical engineering. Electronics Nuclear engineering |
| Subjects: | Technology > Electrical engineering. Electronics Nuclear engineering |
| Department: | Faculty of Engineering > Electronic and Electrical Engineering |
| Related URLs: | |
| Depositing user: | Pure Administrator |
| Date Deposited: | 07 May 2012 15:09 |
| Last modified: | 04 Oct 2012 16:40 |
| URI: | http://strathprints.strath.ac.uk/id/eprint/39574 |
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