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The Strathprints institutional repository is a digital archive of University of Strathclyde research outputs.

Strathprints serves world leading Open Access research by the University of Strathclyde, including research by the Strathclyde Institute of Pharmacy and Biomedical Sciences (SIPBS), where research centres such as the Industrial Biotechnology Innovation Centre (IBioIC), the Cancer Research UK Formulation Unit, SeaBioTech and the Centre for Biophotonics are based.

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An implementation of a gigabit Ethernet AES encryption engine for application processing in SDR

Denning, D. and Irvine, J. and Harold, N. and Dunn, P. and Devlin, M. (2004) An implementation of a gigabit Ethernet AES encryption engine for application processing in SDR. In: 60th IEEE Vehicular Technology Conference, 2004-09-26 - 2004-09-29.

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Abstract

In this paper, we present a Gigabit Ethernet AES (Advanced Encription Standard) Encription Engine. One of the main push factors in software-defined radio(SDR) is the use of programinable devices such as field programmable gate arrays (FPGAs) or digital a signal processors (DSPs). Including such devices in SDR base station systems allows for reconfiguration and upgrade of the communication system and the application processing. Due to the increased concerns regarding secure information, we have implemented an AES encryption engine for data processing in a SDR system using one of the latest FPGAs available. The engine is capable of simultaneously processing 2 input and 2 output data streams of 1 Gigabit each. As the system has been developed on an inchistrial scalable architecture, a further 3 FPGA daughter cards can be added to the board for further application processing, and each board could be one of many.