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Mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system

Eltahir, M. and Dunlop, J. (2001) Mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system. In: EPMCC 01, 2001-02-20 - 2001-02-22, Vienna.

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Abstract

This paper looks at the mapping of 2.5/3G standards onto a virtual bus architecture for hierachical cellular system

Item type: Conference or Workshop Item (Paper)
ID code: 37665
Keywords: mapping, 2.5/3g standards, virtual bus architecture, hierarchical cellular System, Electrical engineering. Electronics Nuclear engineering
Subjects: Technology > Electrical engineering. Electronics Nuclear engineering
Department: Faculty of Engineering > Electronic and Electrical Engineering
Depositing user: Pure Administrator
Date Deposited: 14 Feb 2012 16:46
Last modified: 04 Oct 2012 16:09
URI: http://strathprints.strath.ac.uk/id/eprint/37665

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