Picture of scraped petri dish

Scrape below the surface of Strathprints...

The Strathprints institutional repository is a digital archive of University of Strathclyde research outputs. Explore world class Open Access research by researchers at Strathclyde, a leading technological university.

Explore

Benchmarking and optimisation of Simulink code using Real-Time Workshop and Embedded Coder for inverter and microgrid control applications

Roscoe, A. J. and Blair, S. M. and Burt, G.M. (2009) Benchmarking and optimisation of Simulink code using Real-Time Workshop and Embedded Coder for inverter and microgrid control applications. In: Proceedings of the 44th International Universities Power Engineering Conference (UPEC), 2009. IEEE, pp. 532-536. ISBN 978-1-4244-6823-2

[img] PDF
C_2009_Roscoe_UPEC_RealTimeWorkshop_Published.pdf - Published Version

Download (6MB)
[img]
Preview
PDF
C_2009_Roscoe_UPEC_RealTimeWorkshop_PostPrint.pdf - Submitted Version

Download (392kB) | Preview

Abstract

When creating software for a new power systems control or protection device, the use of auto-generated C code via MATLAB Simulink Real-Time Workshop and Embedded Coder toolboxes can be a sensible alternative to hand written C code. This approach offers the benefits of a simulation environment, platform independence and robust code. This paper briefly summarises recent experiences with this coding process including the pros and cons of such an approach. Extensive benchmarking activities are presented, together with descriptions of simple (but non-obvious) optimisations made as a result of the benchmarking. Examples include replacement of certain Simulink blocks with seemingly more complex blocks which execute faster. "S functions" are also designed for certain key algorithms. These must be fully "in-lined" to obtain the best speed performance. Together, these optimisations can lead to an increase in execution speed of more than 1.4x in a large piece of auto-generated C code. An example is presented, which carries out Fourier analysis of 3 signals at a common (variable) frequency. The overall speed improvement relative to the baseline is 2.3x, of which more than 1.4x is due to non-obvious improvements resulting from benchmarking activities. Such execution speed improvements allow higher frame rates or larger algorithms within inverters, drives, protection and control applications.